HP FOCUS (Ofer Abarbanel online library)

The Hewlett-Packard FOCUS microprocessor, launched in 1982, was the first commercial, single chip, fully 32-bit microprocessor available on the market. At this time, all 32-bit competitors (DEC, IBM, Prime Computer, etc.) used multi-chip bit-slice-CPU designs.

Introduced in the Hewlett-Packard HP 9000 Series 500 workstations and servers (originally launched as the HP 9020 and also, unofficially, called HP 9000 Series 600), the single-chip CPU was used alongside the I/O Processor (IOP), Memory Controller (MMU), Clock, and a number of 128-kilobit dynamic RAM devices[1] as the basis of the HP 9000 system architecture.[2] It was a 32-bit implementation of the 16-bit HP 3000 computer’s stack architecture,[3] with over 220 instructions (some 32 bits wide, some 16 bits wide), a segmented memory model, and no general purpose programmer-visible registers.[4] The design of the FOCUS CPU was richly inspired by the custom silicon on sapphire (SOS) chip design, HP used in their HP 3000 series machines.

Because of the high density of HP’s NMOS-III IC process,[5] heat dissipation was a problem. Therefore, the chips were mounted on special printed circuit boards, with a ~1 mm copper sheet at its core, called “finstrates”.[6][7]

The Focus CPU is microcoded with a 9,216 by 38-bit microcode control store. Internal data paths and registers are all 32-bit wide. The Focus CPU has a transistor count of 450,000 FETs.[3][7]

References

  1. ^Wheeler, John K.; Spencer, John R.; Beucler, Dale R.; Kohlhardt, Charlie G. (August 1983). “128K-Bit NMOS Dynamic RAM with Redundancy”. Hewlett-Packard Journal. 34 (8): 20–24. Retrieved 6 October 2020.
  2. ^Beyers, Joseph W.; Zeller, Eugene R.; Seccombe, S. Dana (August 1983). “VLSI Technology Packs 32-Bit Computer System into a Small Package”. Hewlett-Packard Journal. 34 (8): 3–6. Retrieved 6 October 2020.
  3. ^ Jump up to:ab Burkhart, Kevin P.; Forsyth, Mark A.; Hammer, Mark E.; Tanksalvala, Darius F. (August 1983). “An 18-MHz, 32-Bit VLSI Microprocessor”. Hewlett-Packard Journal. 34 (8): 7–8, 10, 11. Retrieved 6 October 2020.
  4. ^Fiasconaro, James G. (August 1983). “Instruction Set for a Single-Chip 32-Bit Processor”. Hewlett-Packard Journal. 34 (8): 9–10. Retrieved 6 October 2020.
  5. ^Mikkelson, James M.; Fei, Fung-Sun; Malhotra, Arun K.; Seccombe, S. Dana (August 1983). “NMOS-III Process Technology”. Hewlett-Packard Journal. 34 (8): 27–30. Retrieved 6 October 2020.
  6. ^Malhotra, Arun K.; Leinbach, Glen E.; Straw, Jeffery J.; Wagner, Guy R. (August 1983). “Finstrate: A New Concept in VLSI Packaging”. Hewlett-Packard Journal. 34 (8): 24–26. Retrieved 6 October 2020.
  7. ^ Jump up to:ab “OpenPA: HP 9000/500 FOCUS”. Paul Weissmann. Retrieved February 25, 2005.
  • “HP Computer Museum: Technical Desktops: Series 500”.See “Product Documentation”. for HP Journal articles.
  • “HP 9000” (PDF). HP Journal. 34(8). August 1983.
  • Beyers, J.W.; Dohse, L.J.; Fucetola, J.P.; Kochis, R.L.; Lob, C.G.; Taylor, G.L.; Zeller, E.R. (October 1981). “A 32-bit VLSI CPU chip”. IEEE Journal of Solid-State Circuits. 16(5): 537–542. doi:10.1109/JSSC.1981.1051634.

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